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1 ? fn7333.5 EL7516 600khz/1.2mhz pwm step-up regulator the EL7516 is a high frequency, high efficiency step-up voltage regulator operated at constant frequency pwm mode. with an internal 1.5a, 200m ? mosfet, it can deliver up to 600ma output current at over 90% efficiency. the selectable 600khz and 1.2mhz allows smaller inductors and faster transient response. an external compensation pin gives the user greater flexibility in setting frequency compensation allowing the use of low esr ceramic output capacitors. when shut down, it draws < 10a of current and can operate down to 2.5v input supply. these features along with 1.2mhz switching frequency makes it an ideal device for portable equipment and tft-lcd displays. the EL7516 is available in an 8-pin msop package with a maximum height of 1.1mm. the device is specified for operation over the full -40c to +85c temperature range. pinout EL7516 (8-pin msop) top view features ? >90% efficiency ? 1.6a, 200m ? power mosfet ?v in > 2.5v ? 600khz/1.2mhz switching frequency selection ? adjustable soft-start ? internal thermal protection ? 1.1mm max height 8-pin msop package ? pb-free plus anneal available (rohs compliant) applications ? tft-lcd displays ? dsl modems ? pcmcia cards ? digital cameras ? gsm/cdma phones ? portable equipment ? handheld devices fb fsel shdn vdd gnd lx comp ss 1 2 3 4 8 7 6 5 ordering information part number part marking tape & reel package pkg. dwg. # EL7516iy f - 8-pin msop mdp0043 EL7516iy-t7 f 7? 8-pin msop mdp0043 EL7516iy-t13 f 13? 8-pin msop mdp0043 EL7516iyz (see note) baraa - 8-pin msop (pb-free) mdp0043 EL7516iyz-t7 (see note) baraa 7? 8-pin msop (pb-free) mdp0043 EL7516iyz-t13 (see note) baraa 13? 8-pin msop (pb-free) mdp0043 note: intersil pb-free plus anneal products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. data sheet april 5, 2006 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2002, 2004-2006. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 fn7333.5 april 5, 2006 absolute maxi mum ratings (t a = 25c) lx to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18v v dd to gnd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5v comp, fb, shdn , ss, fsel to gnd . . . . . . . -0.3v to (v dd +0.3v) storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c operating ambient temperature . . . . . . . . . . . . . . . .-40c to +85c operating junction temperature . . . . . . . . . . . . . . . . . . . . . . +135c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v in = 3.3v, v out = 12v, i out = 0ma, fsel = gnd, t a = 25c unless otherwise specified. parameter description conditions min typ max unit iq1 quiescent current - shut-down shdn = 0v 0.6 10 a iq2 quiescent current - not switching shdn = v dd , fb = 1.3v 0.7 ma iq3 quiescent current - switching shdn = v dd , fb = 1.0v 1.3 2 ma v fb feedback voltage 1.272 1.294 1.309 v i b-fb feedback input bias current 0.01 0.5 a v dd start-up input voltage range 2.6 5.5 v d max -600khz maximum duty cycle fsel = 0v 84 90 % d max -1.2mhz maximum duty cycle fsel = v dd 84 90 % i lim current limit - max peak input current 1.3 1.5 a i shdn shut-down input bias current shdn = 0v 0.01 0.1 a r ds-on switch on resistance v dd = 2.7v, i lx = 1a 0.2 ? i lx-leak switch leakage current vsw = 18v 0.01 3 a ? v out / ? v in line regulation 3v < v in < 5.5v, v out = 12v 0.1 % ? v out / ? i out load regulation v in = 3.3v, v out = 12v, i o = 30ma to 200ma 6.7 mv/a f osc1 switching frequency accuracy fsel = 0v 500 620 740 khz f osc2 switching frequency accuracy fsel = v dd 1000 1250 1500 khz v il shdn , fsel input low level 0.5 v v ih shdn , fsel input high level 2.7 v v il shdn , input low level 5v input supply 1.25 v v ih shdn , input high level 5v input supply 4.5 v g m error amp tranconductance ? i = 5a 90 130 170 1/ ? a v voltage gain 350 v/v v dd-on v dd uvlo on threshold 2.40 2.51 2.60 v v dd-off v dd uvlo off threshold 2.20 2.30 2.40 v i ss soft-start charge current 4 6 8 a r cs current sense transresistance 0.08 v/a otp over temperature protection 130 c EL7516
3 fn7333.5 april 5, 2006 block diagram typical application circuit comparator oscillator shutdown & start-up control lx vdd fsel shdn ss reference generator pwm logic controller fet driver current sense gm amplifier gnd fb comp pin descriptions pin number pin name description 1 comp compensation pin. output of the internal error ampl ifier. capacitor and resistor from comp pin to ground. 2 fb voltage feedback pin. internal reference is 1.294v nominal. connect a resistor divider from v out . v out = 1.294v (1 + r 1 / r 2 ). see typical application circuit. 3 shdn shutdown control pin. pull shdn low to turn off the device. 4 gnd analog and power ground. 5 lx power switch pin. connected to the drain of the internal power mosfet. 6 vdd analog power supply input pin. 7 fsel frequency select pin. when fsel is set low, sw itching frequency is set to 620khz. when connected to high or v dd , switching frequency is set to 1.25mhz. 8 ss soft-start control pin. connect a capacitor to control the converter start-up. 1 2 3 4 8 7 6 5 comp fb shdn gnd ss fsel vdd lx + + 3.9k ? 4.7nf 27nf 22f c 3 c 1 0.1f 10h d 1 22f c 2 12v 2.7v to 5.5v r 3 c 5 85.2k ? r 1 10k ? r 2 c 4 s1 EL7516
4 fn7333.5 april 5, 2006 typical performance curves figure 1. efficiency - 3.3v v in to 12v v out @ 1.3mhz figure 2. load regulation - 3.3v v in to 12v v out @ 1.3mhz figure 3. efficiency - 3.3v v in to 12v v out @ 620khz figure 4. load regulation - 3.3v v in to 12v v out @ 620khz figure 5. efficiency - 3.3v v in to 9v v out @ 1.2mhz figure 6. load regulation - 3.3v v in to 9v v out @ 1.2mhz 0 100 200 300 400 95 90 85 80 75 i out (ma) efficiency (%) 0 50 250 300 350 0.6 0.2 -0.2 -0.6 -1 i out (ma) load regulation (%) 100 150 200 0.4 0 -0.4 -0.8 0 100 200 300 400 90 85 80 75 i out (ma) efficiency (%) 1 0.5 -0.5 -1 i out (ma) load regulation (%) 0 50 250 300 350 100 150 200 0 0 100 300 400 500 95 90 80 70 i out (ma) efficiency (%) 85 75 200 1 0.5 -0.5 -1 i out (ma) load regulation (%) 0 300 400 500 100 200 0 EL7516
5 fn7333.5 april 5, 2006 figure 7. efficiency - 3.3v v in to 9v v out @ 600khz figure 8. load regulation - 3.3v v in to 9v v out @ 600khz figure 9. efficiency - 5v v in to 12v v out @ 1.2mhz figure 10. load regulation - 5v v in to 12v v out @ 1.2mhz figure 11. efficiency - 5v v in to 12v v out @ 600khz figure 12. load regulation - 5v v in to 12v v out @ 600khz typical performance curves (continued) 0 100 300 400 500 90 85 75 i out (ma) efficiency (%) 80 200 1 -0.6 -1 i out (ma) load regulation (%) 0 300 400 500 100 200 -0.2 0.2 0.6 0 300 500 600 95 90 75 i out (ma) efficiency (%) 80 100 85 400 200 0.8 -0.6 -1 i out (ma) load regulation (%) 0 300 500 600 100 200 -0.2 0.2 0.6 400 -0.8 -0.4 1 0.4 0 300 500 600 92 90 84 i out (ma) efficiency (%) 86 100 88 400 200 0.8 -0.6 -1 i out (ma) load regulation (%) 0 300 500 600 100 200 -0.2 0.2 0.6 400 -0.8 -0.4 1 0.4 EL7516
6 fn7333.5 april 5, 2006 figure 13. efficiency - 5v v in to 9v v out @ 1.2mhz figure 14. load regulation - 5v v in to 9v v out @ 1.2mhz figure 15. line regulation figure 16. line regulation figure 17. efficiency vs i out - 3.3v to 8v figure 18. load regulation - 3.3v to 8v typical performance curves (continued) 0 400 800 1k 95 90 75 i out (ma) efficiency (%) 80 85 600 200 0.6 -0.6 -1 i out (ma) load regulation (%) 0 400 800 1k 200 -0.2 0 0.4 600 -0.8 -0.4 0.2 246 0.2 0.1 -0.2 v in (v) line regulation (%) -0.1 0 5 3 v out =12v i out =80ma 1.2mhz 600khz 2.5 4.5 6.5 0.1 0.05 -0.1 v in (v) line regulation (%) -0.05 0 5.5 3.5 v out =8v i out =80ma 600khz 1.2mhz 10 310 610 95 90 70 i out (ma) efficiency (%) 75 85 510 110 1.2mhz 600khz 80 410 210 0 300 600 0.5 0.3 -0.5 i out (ma) load regulation (%) -0.3 0.1 500 100 1.2mhz 600khz -0.1 400 200 EL7516
7 fn7333.5 april 5, 2006 figure 19. efficiency vs i out figure 20. frequency (1.2mhz) vs v in figure 21. frequency (600khz) vs v in figure 22. efficiency - 5v v in to 9v v out @ 600khz figure 23. load regulation - 5v v in to 9v v out @ 600khz figure 24. transient reponse - 600khz typical performance curves (continued) 0 600 1.2k 94 76 i out (ma) efficiency (%) 82 1k 200 1.2mhz 600khz 84 800 400 92 88 78 80 90 86 2.5 4 5.5 1.29 1.2 v in (v) frequency (mhz) 1.23 5 3 1.24 4.5 3.5 1.28 1.26 1.21 1.22 1.27 1.25 2.5 4 5.5 670 600 v in (v) frequency (khz) 630 5 3 640 4.5 3.5 610 620 660 650 0 400 1k 93 81 i out (ma) efficiency (khz) 87 800 89 600 200 83 85 91 0 400 1k 0.4 -0.4 i out (ma) load regulation (%) 800 -0.2 600 200 0.2 0 v in = 3.3v v out = 12v i out = 50ma to 300ma 0.1ms/div 200mv/div EL7516
8 fn7333.5 april 5, 2006 applications information the EL7516 is a high frequency, high efficiency boost regulator operated at constant frequency pwm mode. the boost converter stores energy from an input voltage source and deliver it to a higher output voltage. the input voltage range is 2.5v to 5.5v and output voltage range is 5v to 18v. the switching frequency is selectable between 600khz and 1.2mhz allowing smaller indu ctors and faster transient response. an external compensation pin gives the user greater flexibility in setting output transient response and tighter load regulation. the conv erter soft-start characteristic can also be controlled by external c ss capacitor. the shdn pin allows the user to completely shut-down the device. boost converter operations figure 28 shows a boost converter with all the key components. in steady state operating and continuous conduction mode where the inductor current is continuous, the boost converter operates in two cycles. duri ng the first cycle, as shown in figure 29, the internal power fet turns on and the schottky diode is reverse biased and cuts off the current flow to the output. the output current is supplied from the output capacitor. the voltage across the inductor is v in and the inductor current ramps up in a rate of v in / l, l is the inductance. the inductance is magnetized and energy is stored in the inductor. the change in inductor current is: figure 25. transient response - 1.2mhz fi gure 26. typical shdn input level vs v in figure 27. package power dissipation vs ambient temperature figure 28. package power dissipation vs ambient temperature typical performance curves (continued) v in = 3.3v v out = 12v i out = 50ma to 300ma 0.1ms/div 200mv/div 0 1 2 3 4 5 3 3.5 4 4.5 5 5.5 6 v in (v) shdn level (v) shdn turn off shdn turn on jedec jesd51-7 high effective thermal conductivity test board 1 0.9 0.6 0.4 0.3 0.2 0.1 0 0 255075100125 ambient temperature (c) power dissipation (w) 85 870mw j a = 1 1 5 c / w m s o p 8 0.8 0.5 0.7 jedec jesd51-3 low effective thermal conductivity test board 0.6 0.4 0.3 0.2 0.1 0 0 255075100125 ambient temperature (c) power dissipation (w) 85 486mw j a = 2 0 6 c / w m s o p 8 0.5 ? i l1 ? t1 v in l --------- = ? t1 d f sw ------------ = d duty cycle = ? v o i out c out --------------- - ? t 1 = EL7516
9 fn7333.5 april 5, 2006 during the second cycle, the power fet turns off and the schottky diode is forward bias ed, figure 30. the energy stored in the inductor is pumped to the output supplying output current and charging the output capacitor. the schottky diode side of the inductor is clamp to a schottky diode above the output voltage. so the voltage drop across the inductor is v in - v out . the change in inductor current during the second cycle is: for stable operation, the same amount of energy stored in the inductor must be taken out. the change in inductor current during the two cycl es must be the same. figure 29. boost converter figure 30. boost converter - cycle 1, power switch closed figure 31. boost converter - cycle 2, power switch open output voltage an external feedback resistor divider is required to divide the output voltage down to the nominal 1.294v reference voltage. the current drawn by the resistor network should be limited to maintain the overall converter efficiency. the maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. a resistor network less than 100k is recommended. the boost converter output voltage is determined by the relationship: the nominal vfb voltage is 1.294v. inductor selection the inductor selection determines the output ripple voltage, transient response, output current capability, and efficiency. its selection depends on the inpu t voltage, output voltage, switching frequency, and maximum output current. for most applications, the inductance should be in the range of 2h to 33h. the inductor maximum dc current specification must be greater than the peak inductor current required by the regulator. the peak inductor current can be calculated: output capacitor low esr capacitors should be used to minimized the output voltage ripple. multila yer ceramic capacitors (x5r and x7r) are preferred for the output capacitors because of their lower esr and small packages. tantalum capacitors with higher esr can also be used. the output ripple can be calculated as: for noise sensitive application, a 0.1f placed in parallel with the larger output capacitor is recommended to reduce the switching noise coupled from the lx switching node. ? i l ? t2 v in v out ? l ------------------------------- - = ? t2 1d ? f sw ------------- = ? i1 ? i2 + 0 = d f sw ------------ v in l --------- 1d ? f sw ------------- v in v out ? l ------------------------------- - + 0 = v out v in --------------- - 1 1d ? ------------- = EL7516 c out c in ld v in v out EL7516 c out c in l v in v out ? t 1 ? v o i l ? i l1 EL7516 c out c in ld v in v out ? t 2 ? v o ? i l2 i l v out v fb 1 r 1 r 2 ------ - + ?? ?? ?? = i l peak () i out v out v in ----------------------------------- - 12 ? v in v out v in ? () lv out freq ---------------------------------------------------- - + = ? v o i out d f sw c o --------------------------- i out esr + = EL7516
10 fn7333.5 april 5, 2006 schottky diode in selecting the schottky di ode, the reverse break down voltage, forward current and forward voltage drop must be considered for optimum conver ter performance. the diode must be rated to handle 1.5a, the current limit of the EL7516. the breakdown voltage must exceed the maximum output voltage. low forward voltage drop, low leakage current, and fast reverse recove ry will help the converter to achieve the maximum efficiency. input capacitor the value of the input capacitor depends the input and output voltages, the maximum ou tput current, the inductor value and the noise allowed to put back on the input line. for most applications, a minimu m 10f is required. for applications that run close to the maximum output current limit, input capacitor in the range of 22f to 47f is recommended. the EL7516 is powered from the v in . to. high frequency 0.1f by-pass cap is recommended to be close to the v in pin to reduce supply line noise and ensure stable operation. loop compensation the EL7516 incorporates an transconductance amplifier in its feedback path to allow the user some adjustment on the transient response and better regulation. the EL7516 uses current mode control architectu re which has a fast current sense loop and a slow voltage feedback loop. the fast current feedback loop does not require any compensation. the slow voltage loop must be compensated for stable operation. the compensation network is a series rc network from comp pin to gro und. the resistor sets the high frequency integrator gain for fast transient response and the capacitor sets the integrator zero to ensure loop stability. for most applications, the compensation resistor in the range of 2k to 7.5k and the compensation capacitor in the range of 3nf to 10nf. soft-start the soft-start is provided by an internal 6a current source charges the external c ss , the peak mosfet current is limited by the voltage on the capacitor. this in turn controls the rising rate of the output voltage. the regulator goes through the start-up sequence as well after the shdn pin is pulled to hi. frequency selection the EL7516 switching frequency can be user selected to operate at either at constant 620khz or 1.25mhz. connecting f sel pin to ground sets the pwm switching frequency to 620khz. when connect f sel high or v dd , switching frequency is set to 1.25mhz. shut-down control when shut-down pin is pulled down, the EL7516 is shut- down reducing the supply current to <3a. EL7516 does not use a level translator or ground-referenced threshold for the shdn input. for different supply voltages, please refer the figure 32 to choose right input threshold voltages for shdn, where vtp is about 1v. it is recommend that v ih = (v in -vtp/2) and v il = (v in /4). if the consistent shdn threshold is desired in the application, an external active level shifter must be used, simplest circuit requires 1 nmos and 1 resistor as shown in figure 33, where the gate of the nmos is connected to supply of pwron logic circuit, and the source of the nmos goes to pwron pin of the converter. maximum output current the mosfet current limit is nominally 1.5a and guaranteed 1.3a. this restricts the maximum output current i omax based on the following formula: figure 32. shdn input threshold vs input supply voltage v ih , upper 0v v in (v in -vtp) (v in /2) keep out v il , lower v in v in =3.3v v in =5.5v shdn input thresholds logic threshold logic threshold figure 33. level shifter circuit supply input voltage to EL7516 pin3 shdn 20k 3vd 20k pwron pin of the converter i l i l-avg 12 ?? i l () + = EL7516
11 fn7333.5 april 5, 2006 where: i l = mosfet current limit i l-avg = average inductor current ? i l = inductor ripple current v diode = schottky diode forward voltage, typically, 0.6v f s = switching frequency, 600khz or 1.2mhz d = mosfet turn-on ratio: the following table gives typical maximum iout values for 1.2mhz switching frequency and 22h inductor: thermal performance the EL7516 uses a fused-lead package, which has a reduced ja of 100c/w on a four-layer board and 115c/w on a two-layer board. maximizing copper around the ground pins will improve the thermal performance. this device also has internal thermal shut-down set at around 130c to protect the component. layout considerations to achieve highest efficiency, best regulation and most stable operation, a good printed circuit board layout is essential. it is strongly re commended that the demoboard layout to be followed as closely as possible. use the following general guidelines when laying out the print circuit board: 1. place c 4 as close to the v dd pin as possible. c 4 is the supply bypass capacitor of the device. 2. keep the c 1 ground, gnd pin and c 2 ground as close as possible. 3. keep the two high current paths a) from c 1 through l 1 , to the lx pin and gnd and b) from c 1 through l 1 , d 1 , and c 2 as short as possible. 4. high current traces should be short and as wide as possible. 5. place feedback resistor close to the fb pin to avoid noise pickup. 6. place the compensation network close to the comp pin. the demo board is a good exampl e of layout based on these principles; it is available upon request. table 1. v in (v) v out (v) i omax (ma) 2.5 5 570 2.5 9 325 2.5 12 250 3.3 5 750 3.3 9 435 3.3 12 330 5 9 650 5 12 490 ? i l v in v o v diode + () v in ? [] lv o ( v diode ) f s + ------------------------------------------------------------------------------ = i l-avg i out 1d ? ------------- = d1 v in v out v diode + -------------------------------------------- ? = EL7516
12 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7333.5 april 5, 2006 msop package information note: the package drawing shown here may not be the latest version. to check the latest revision, please refer to the intersil w ebsite at EL7516

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